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Efficiency and Flexibility: Chip Design Redefined

Време10. септембар 2013. 12:16
ПредавачПроф. др Дејан Марковић
Местосала 61, Електротехничког факултета

Abstract:

CMOS technology has changed. Scaling now offers limited improvements in energy efficiency due to variations and leakage. Design must be more energy efficient. Applications have changed. Increasing diversity of functions requires more flexible DSP chips. Custom chips are very costly, flexible chips overrun energy budget. This talk will redefine DSP chip design to address these challenges. Insights from FFT factorizations are applied to chip-level interconnect networks to show that efficiency and flexibility can coexist.

Biography:

Dejan Marković is an Associate Professor of Electrical Engineering at the University of California, Los Angeles. He completed the Ph.D. degree in 2006 at the University of California, Berkeley. In recognition of the impact of his Ph.D. work, he was awarded 2007 David J. Sakrison Memorial Prize at UC Berkeley. His current research is focused on integrated circuits for emerging radio and healthcare systems, programmable ICs, design with post-CMOS devices, optimization methods and CAD flows. He received an NSF CAREER Award in 2009. In 2010, he was a co-recipient of ISSCC Jack Raper Award for Outstanding Technology Directions and a winner of the DAC/ISSCC Student Design Contest.