| Course title |
Computer Systems for VLSI |
| Acronym |
13E114VLSI |
| Study programme |
Electrical Engineering and Computing |
| Module |
Computer Engineering and Informatics, Software Engineering |
| Type of study |
bachelor academic studies,master academic studies |
| Lecturer (for classes) |
|
| Lecturer/Associate (for practice) |
|
| Lecturer/Associate (for OTC) |
|
| ESPB |
6.0 |
Status |
elective |
| Condition |
None. |
| The goal |
Introduce students to hardware description languages (VHDL, Verilog, SystemVerilog, MaxJ). Introduce students to design flow of computer systems for VLSI. Provide students with ability to design, verify and synthesize computer systems. Introduce students to FPGA technology. Introduce students to FPGA based supercomputers for dataflow processing. |
| The outcome |
Students will get introduced with constructs of VHDL and Verilog, and generate the ability to use them. Students will get introduced to UVM and basic SystemVerilog constructs. Students will generate the ability to generate configuration and configure FPGA. Students will get the ability for programming FPGA based supercomputers for dataflow processing. |